1. Field of the Invention
The present invention relates to semiconductor methods and systems, and more particularly to chemical mechanical planarization (CMP) methods and systems.
2. Description of the Related Art
With advances in electronic products, semiconductor technology has been applied widely in manufacturing memories, central processing units (CPUs), liquid crystal displays (LCDs), light emitting diodes (LEDs), laser diodes and other devices or chip sets. In order to achieve high-integration and high-speed requirements, dimensions of semiconductor integrated circuits have been reduced and various materials, such as copper and ultra low-k dielectrics, have been proposed along with techniques for overcoming manufacturing obstacles associated with these materials and requirements. In order to form a copper damascene structure, various chemical mechanical planarization (CMP) processes, such as oxide CMP or metal CMP, have been proposed and used.
The CMP process uses abrasive and corrosive chemical slurry in conjunction with a polishing pad and a dynamic polishing head retaining a wafer. The dynamic polishing head is rotated with different axes of rotation to press the wafer against the polishing pad. The CMP process removes material and evens out irregular topography of the wafer so as to flatten or planarize the wafer. During the CMP process, chemicals in a slurry react with and/or weaken the material to be removed. The abrasives accelerate the weakening process and the polishing pad helps to wipe the reacted materials from the surface of the wafer.
Due to the high rotational speed of the polishing head, slurries may be spun away from the polishing pad and/or polishing head and attach on other parts of the CMP system. The spun slurries may become dried or solidified after attaching on these other parts of the CMP system. The solidified slurries may detach from the parts of the CMP system, falling on the polishing pad. During a polishing process, the detached solidified slurries may scratch the surface of the wafer and destroy the topography of the wafer. The detached solidified slurries may be a factor affecting a yield of integrated circuits formed on the wafer.
From the foregoing, it can be seen that CMP methods and apparatus are desired.